When data are transferred between devices, in order to improve speed of the data transfer, a sending side sends data after dividing packets into a plurality of parallel signal lines and a reception side restores received data into original packets. In the data transfer, it is difficult to transfer data when one of the parallel signal lines is failed. Therefore, the data transfer continues by utilizing normal signal lines except the failed signal line.
FIG. 18˜FIG. 21 illustrate diagrams that related arts are explained. FIG. 18 illustrates a data transfer control device that connects a sending signal line selection unit 102 of the sending device 100 with a reception signal line selection unit 202 of the reception device 200 via eight signal lines 300-0˜300-7. However, a number of the signal lines is limited to eight.
In the sending device 100, the sending signal line selection unit 102 distributes serial sending data D0˜D7 into parallel signal lines 300-0˜300-7 via drivers 106-0˜106-7. In the reception device 200, the reception signal line selection unit 202 receives the data D0˜D7 through drivers 206-0˜206-7 from the signal lines 300-0˜300-7, arranges and converts into the serial data D0˜D7 and outputs as reception data.
When such parallel signal lines are utilized, it is difficult to transfer data when any one of the eight signal line paths #0˜#7 (the signal lines 300-0˜300-7, the drivers 106-0˜106-7 and the receivers 206-0˜206-7) is failed. Therefore, it is proposed to divide the signal line path (called as lane as below) into two groups of [#0˜#3] and [#4˜#7] and manage whether failure signal line is existed in each group.
In FIG. 18, a signal line control unit 104 is provided to the sending device 100 and a failure detection circuit 208 and a signal line control unit 204 are provided to the reception device 200. The failure detection circuit 208 detects whether each signal line path (lane) is failed. The signal line control units 104 and 204 permits a selection of all signal lines to corresponding the signal line selection unit 102 and the reception signal line selection unit 202 when any one of each signal line path (lane) is not failed.
As illustrated in FIG. 19, when the failure detection circuit 208 detects the failure of single signal line (lane #5: a path of the signal line 300-5, the driver 106-5 and the receiver 206-5 in FIG. 19), the signal line control units 104 and 204 control that the signal line selection unit 102 and the reception signal line selection unit 202 separate the failure signal line #5 and not-failed signal lines (the lane #4, #6 and #7) within the group [#4˜#7] belonging to the failure signal line #5 from the data transfer.
By the separation, the data transfer continues by using remaining four signal lines 300-0˜300-3 to reduce the lane #0˜#3. That is, the data transfer continues by reducing x4 link width construction from x8 link width construction. FIG. 20 and FIG. 21 illustrate a flow of the reduction. In x8 link width construction ‘A’ that all lanes of #0˜#7 are not failed, when one lane is failed, the construction reduces x4 link width construction ‘B’ that utilizes lane #0˜#3 if the lanes #0˜#3 are not failed. As same as, when one lane is failed, the construction reduces x4 link width construction ‘C’ that utilizes lane #4˜#7 if the lanes #4˜#7 are not failed.
However, it is difficult to continue data transfer with the x4 link width construction that has half link width of x8 link width construction when one of four signal lines that is utilized for data transfer is failed.
FIG. 22, FIG. 23 and FIG. 24 illustrate diagrams of explanation in other related art. FIG. 22 illustrates an example of the bi-directional data transfer. That is, the sending unit 100 in the first device sends data to the reception unit 200 of the second device through lanes #0˜#7 and the reception unit 400 of the first device receives the data from the sending unit 300 in the second device through the lanes #0˜#7. The lane #0˜#7 are same as an example in FIG. 18.
In this example, a number of combinations of four lanes are increased at the reduction. As illustrated in FIG. 23 and FIG. 24, in the x8 (eight) link width construction ‘A’ that all lanes of #0˜#7 are not failed, when one lane is failed, the construction reduces x4 link width construction ‘B’ that utilizes lane #0˜#3 if the lanes #0˜#3 are not failed. As same as, when one lane is failed, the construction reduces x4 link width construction ‘C’ that utilizes lane #4˜#7 if the lanes #4˜#7 are not failed.
And in an example in FIG. 23, it is provided four patterns as the reduction patterns of four lanes. When one lane is failed in status that reduced x4 link width construction, in x4 link width construction ‘B’ which utilizes lanes #0˜#3 or in x4 link width construction ‘C’ which utilizes lanes #4˜#7, it is reduced to x4 link width construction ‘D’ that utilizes the lane #0, #1, #4, #5 when all lanes of #0, #1, #4, #5 are not failed. As same as, it is reduced to x4 link width construction ‘E’ that utilizes the lane #2, #3, #6, #7 when all lanes of #2, #3, #6, #7 are not failed. It is reduced to x4 link width construction ‘F’ that utilizes the lane #0 #1 #6, #7 when all lanes of #0, #1, #6, #7 are not failed. It is reduced to x4 link width construction ‘G’ that utilizes the lane #2, #3, #4, #5 when all lanes of #2, #3, #4, #5 are not failed.
For example, as illustrated in FIG. 22, when detecting the failure of single signal line (lane #4: a path of the signal line 300-4, the driver 106-4 and the receiver 206-4 in FIG. 22), the signal line control units 104 and 204 of the sending device and the reception device control that the signal line selection unit 102 and the reception signal line selection unit 202 separate the failure signal line #4 and not-failed signal lines (the lane #5, #6 and #7) within the group [#4˜#7] belonging to the failure signal line #4 from the data transfer. By the separation, the data transfer continues by using remaining four signal lines 300-0˜300-3 to reduce the lane #0˜#3.
Further, when one lane #0 among four lanes #0˜#3, that is utilized for data transfer, is failed, a pair lanes #6 and #7, that is non-failed signal lines in a separated group, are utilized and the failed lane #0 and its pair lane #1 are separated. In this timing, same lane change is achieved to the reception device 300 and the sending device 400.
In this way, it is possible to suppress the reduction width to half by selecting the signal line which is not utilized in the reduction even though two signal lines are failed among eight signal lines.    Patent Document 1: Japanese Laid-open Patent Publication No. 05-250317    Patent Document 2 Japanese Laid-open Patent Publication No. 05-173922    Patent Document 3 Japanese Laid-open Patent Publication No. 05-257871    Patent Document 4 Japanese Laid-open Patent Publication No. 02-234254